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Saturday, March 20, 2021

Building a Curve Tracer - Version 3

                                                              Mark's contraption

                                                                And this is mine.

 

Version 3 of the Curve Tracer Project

Based on the experiences we collected with Version 2, we made some significant changes to make it a lot more reliable, easier to build with commonly available parts, and with greatly increased usability and safety.

During the development and testing phase, we use 10x10cm boards that contain the required functionalities. I will describe them below.

The pictures above show that we're working hard on the completion of this version.We now have a fully functional V3 Curve Tracer and can make measurements (see towards the end of this blog). 

 

1. The auxiliary supply

This is the supply for all the voltages for the Op-amps and other parts. There are actually three segments, all fed by one transformer that has dual primary windings for 230V and 115V based main voltages, and equal dual secondary windings. We need dual secondary windings that are isolated from each other because we need a fully isolated supply for the Step Generator.

So one separate winding from the transformer is used for the Step Generator, and the other winding for the rest lime the Triangle Generator, the /Collector/Drain supply and the XY amplifier.  This supply generates voltages of +10V, -5V and +24V. The +10V is used as a reference for a few critical circuits, so with the next revision we are going to make this supply adjustable with a trimmer.

The -5 and +10 voltage regulators get a little too hot. This is mostly because of the voltage drop over them. The transformer we used is overkill, but Mark had a number available we used during the testing. In the next board turn, we're going to a lower voltage, lower wattage version.

The Step Gen supply section is the +15V (called plusStep in the schematics) and -15V (minStep) for the Step Generator circuits. This supply is floating (isolated) from all the other supplies and uses a separate winding from the transformer to accomplish this.


The third section is for the X-Y amplifier. It needs -5V (minusXY, the same as minTri)  and +24V (plusXY). We use a multiplier and a regulator to get this voltage. The 24V is needed because we need a minimum deflection of 20V to show the 200V Collector/Drain supply on the DSO, and also enough steps that are measured with the Collector or Drain current.

 

We've made several changes to this portion of the supply that will be reflected in the next revision.


2. Triangle Generator

The Triangle Generator is the hart of both the Collector/Drain supply and also the Step Generator. It creates the triangle wave form that is the basis for the Collector/Drain supply, and it triggers the Step Generator so the steps are aligned with the triangle signal.


When voltages higher than approx. 50V are present, an LED on the front panel is lit as a warning.
 


3. The AC Collector/Drain Supply

The AC supply section is the first stage for the regulated Collector/Drain supply. 
It contains the transformers for the voltages, the switching of the voltage ranges and the transformer winding switches.
We are using two transformers to create the 35V, 75V and 200V ranges. The ranges are selected by a switch on the front panel.
Bleeder resistors are used to make sure that high voltages are quickly brought to safer lower levels. We use relays to switch the secondary windings of the main transformer from serial to parallel, and use another relays to switch-in the 120VAC transformer for the 200V supply.


Adding Voltage and Current ranges

While we were going through the redesign of the Collector supply controller, I was experimenting with a 120V transformer to see if we could reliably go up the the 200V that I set as the goal for Version 3. Adding that transformer into the mix would cause more switching issues, and I was concerned about the safety aspects with these high voltages. Richard who was continuing to profile Version 2 of the CT was also experiencing problems with the voltage and current settings of his version. He and I continued to blow small signal transistors that we used as the DUT, mostly due to thermal issues when the voltage or current became too high for the poor DUT. This is very easy to do when you try different step settings and the current limit is set too high. With the current configuration, the current limit can be set from zero to 2A and the voltage from zero to 75V both using normal potentiometers. Extending the voltage to 200 V would make it even more difficult to adjust. These two adjustments make it way too easy to select a higher voltage or higher current than the DUT can handle when you are searching for the best step generator setting.

The solution was to create a set of three voltage ranges that can be selected before you start a measurement. This is analog to the way you use the Tek CT's, and that is what most CT users know how to do.

On the front panel, a user can now select the following three ranges: 0-35V at 0-2A, 0-75V at 0-1A and 0-200V at 0-100mA. 

We've made some more changes and are currently on Revision 7 for this board.

 

4. The Collector/Drain Supply

The Collector/Drain supply is one of the two main sections of the Curve Tracer, the other one is the Step Generator discussed below.

The Collector/Drain supply is made up of two sections. One is the AC supply section supplying the raw voltages, and the other one the regulated triangle based buffered output section that we call the Collector/Drain Supply.

Initially, we used Opamps to control the Voltage and the Current regulators, and power transistors or Darlington types for the regulation but we were having all sorts of problems. 

While we were having these issues with the stability, I decided to call in the help from my friend Bud, an ex chip designer from LT. He and I worked together remotely as mouse-pal's on a few other projects, most notably on the UPS power supplies for Raspberry Pies and the differential probe, both described in different Blogs on this site.

 
Bud didn't have our hardware at his disposal, but used LTspice extensively. In simulation, it turned out that due to the Opamps we selected, in combination with the series transistor types, we badly needed different compensation configurations. Over the course of several weeks, investigating, discussing and trying things out, we eventually arrived at a different design that uses MOSFET's as the series regulator.

 
Bud's Wild Hair idea.

Bud could not leave the challenges the Collector Supply circuit poses out of his mind, and started working on a novel and different solution that would accomplish a better regulation transition. He called it a "Wild Hair" idea.

 
 
 
 
This new circuit uses discrete trans-conductance amplifiers for the controllers. This type of amplifier converts a voltage at the differential inputs into a current at the output. This is what we were doing (better: needing), kind of earlier, but in a much more complicated way. The two regulators are now fully discrete using matched transistors (Bud was a chip designer after all), and the LTspice results looked very promising. Gone are the troublesome transitions from voltage regulation to current regulation and back and no more desperate hugging of the Opamps to the rails. 

Driving the parallel MOSFET's

Quite novel is the circuit Bud designed to drive the parallel MOSFET's. In most circuits that I know, there is a separate Opamp to drive the second (or more) MOSFET and it must make sure that the load is in effect really shared. That kind of a circuit is a little more difficult to realize in our setup. Good load sharing is not so simple to do in reality, because with the MOSFET's in the linear mode, a minute change in the Gate drive will cause a major change in the conductivity and hence the temperature. Bud came up with a "current duplicator" circuit where he uses an Opamp that measures the current through the main MOSFET, and drives the "slave" MOSFET to have the same current. This works really well. I measured both the voltages across the 0R5 Source resistors and found them only a few millivolt apart. I also measured the resistance of the two NTC's mounted on top of the MOSFET's to measure the temperatures and they also tracked really well. 

I could run the supply at maximum stress for several minutes and the temperature of the MOSFET's stayed below 50 degrees C at all times. I had to use a pretty big fan to cool my 10W precision load resistors (I used several in series) and they were getting so hot and smelly that my wife in another room started asking alarming questions. The heat sinks for the MOSFET's where sheltered from that fan airflow, of course.

Voltage ranges and current settings

After many deliberations and tests, we decided to offer the following voltage and current ranges: 

  • 0-35V @ 0-2A
  • 0-75V @ 0-1A
  • 0-200V @ 0-100mA.

We also added a current range selection that will allow you to set the maximum current in any of the voltage/current ranges, so you can more easily protect the DUT by selecting a maximum current.

The current range attenuation selections are:

  • x1
  • x.5
  • x.2
  • x.1
  • x.05
  • x.02

This means as an example, that when you select the 70V/1A range, you can set the current selector to 0-1A, 0-500mA, 0-200mA, 0-100mA, 0-50mA and 0-20mA, and also use the current limiting adjustment to go from 0-100% within any of these ranges.

High Voltage Warning Indicator

We wanted to warn the user when dangerous voltages are present on the DUT output connectors. We determined that this is at about 50V and higher. Originally, we used a more complicated circuit that was part of the original range switching of the transformer. Mark came up with a simplified method that just uses a single transistor to drive the LED on the front panel when the 50V threshold is exceeded. After trying that on the new AC supply, we could even make it more simple and avoid having to use a trimmer. This circuit now works very well.

Current Limiting

Below is the current limiting in effect with a 500Hz triangle waveform in the 200V range. This frequency is the practical upper limit we need, although we can go higher. 


 
Note the clean edges top and bottom and the utter lack of wiggles and glitches during the transition from voltage regulation (the triangle slopes) and the current limiting taking over (the flat portion). This is a far cry from our earlier versions so we made the decision to go forward with this design.
 

Output and thermal stress test

In order to verify that the unit can provide the maximum voltages with the maximum currents while all thermals are OK, I ran a few stress tests with the maximum load for every voltage range with the maximum current, by using load resistors to the output. I ran the tests for about 10 minutes each so see if we had any issues.
 
I used an IR-camera ( a new toy for me) to have an overview and make detailed measurements.
 

Obviously, the two MOSFET's are the most involved. The picture above shows that the thermal balance between the two is excellent, and I also measured that the temperature of the hot-spot on the device package itself was not above 50C. The three tests passed with flying colors, although this was with everything in free air. We need to do the tests again when everything is inside the enclosure, but it looks like we have the thermals under control.
 
 

DUT protection circuit

During my extensive testing of DUT's, I had a major disaster happening that blew out many parts on the Collector/Drain supply and also the Step Generator. We needed some sort of protection from this happening again.  More of this is described in the Step Generator section, but the solution we adopted was to disable the Collector/Drain output that could find it's way into the Step Generator circuits. 
We now have in input coming from the detection circuit on the Step Generator and that feeds-in to this supply to kill the output by disabling the triangle input.
 
 
We need to do a lot more testing but also the other changes and features we put on this circuit seem to work really well. Do we have a winner? It sure looks like it, but we're not done testing yet.
 
We are now at Revision 8a for this board.

 

5. The Step Generator

The Step Generator consists of two parts, first the digital to analog (D2A) section that uses the signal coming from the Triangle Generator and creates the stepped waveform. It also has the ability to set the number of Steps and has the Step Cycle Delay circuit. The second part has the Buffered Output section with the output step size selection in Volts or Amps, the offset and the polarity switching.

The D2A section


The optical isolator in the top left of the diagram is where a pulse comes in that is generated by the triangle wave form generator. The edges of the pulse are aligned with the triangle transitions. The signal goes through two gates and enters a CMOS 4040 counter. The counter outputs a count for every transition of the trigger pulse. The resistor ladder network at the output sums the counter outputs and creates the stepped staircase waveform, which is the basis for the Step Generator. The output of the resistor ladder network is buffered by an Opamp to preserve the equality of the steps, while the gain can be set by a trimmer to calibrate the individual step size. Another Opamp creates an inverted signal and together they are used to activate NPN or PNP type DUT's.


The output of the 4040 counter is also going to a CMOS BCD-decimal counter that is used to set the number of steps per cycle. The output resets the 4040 counter, starting a new cycle. The selection of 1 through 7 steps is done through a rotary switch located on the front panel.

To control the thermal heat that can develop in a DUT during a measurement, a delay circuit around a 555 timer is used and driven by a potentiometer with a switch on the front panel and is used to turn the delay feature on and make the delay variable. This function sets a delay between complete step cycles, which can be from 1 to 7 steps. See a more detailed description below.

The Buffered Step Gen Output Section

 

The input for this section comes from the previous circuit. The connector in the top left section is where the positive NPN or negative PNP stepped waveform is entering this buffered output section. The switch that is located on the front panel selects on or the other polarity. This input signal is summed by an Opamp together with the Volt output feed-back signal, coming from an Opamp buffer.
The output goes to another Opamp that is used to create a positive or negative offset to the stepped wave form. The controls are on the front panel. The output goes to a complimentary transistor buffer. The output from this amplifier goes throug a resistor, selected by a rotary switch that sets the output current or voltage going to the DUT Base or Gate.
In the case of a current, there is a feed-back to the Opamp that also deals with the offset. The feed-back is needed to keep the output to the DUT linear. The same is needed in the voltage mode. The Voltage mode is selected by placing a 1K resistor from the output to ground.

The above diagram shows an earlier version of the protection circuits we added, which is needed when the Collector/Drain voltage accidentally connects to the DUT Base or Gate connection, potentially injecting up to 200V into this circuit, and destroying it.
In this particular version, we used two back-2-back MOSFET's in series with the output that are turned off when voltages beyond the +/- 15 Volt supply voltages are detected.
More details can be found below.

 

Above is the Rev2 version of the board. It has been verified and tested. It had a few issues, like an incorrect foot print for the package holding the two MOSFET's.  In this version I used a jumper to select the output current or voltage settings to save a rotary switch. The sliding switch is used to select the voltage or current mode. A new revision has been designed and made that has a new protection circuit on it and implements both the "old" offset circuit and the new one, designed by Mark. His version allows for a larger range in the Volt mode. We also added the circuits to add a few more outputs and used a 1000x multiplier to allow the use of an inexpensive rotary switch, rather than the expensive and single source 18-position one we initially selected.

Protecting the Step Generator

In the post about the Version 2 experiences, I already described the massacre that happened when there was a major catastrophe with the Collector supply. This event showed that the Step Gen was not protected from the high voltages that could make their way into the Base/Gate circuit and cause havoc in the Step Gen circuits

As I already mentioned in that post, Opamps have a really hard time dealing with voltages on the inputs that are greater than the supply voltages. In our case, they are +/- 15V, while the Collector supply can be as high as 200V.

If you realize that there is only a single N or P-junction of a few microns separating the Collector from the Base on a DUT, its easy to see that this can go horribly wrong. If you blow the Collector-Base junction, you have a serious problem. When I examined the 2N3904 or 2N3906 transistors that I blew up, they all suffered from a blown C-B junction for the NPN or a blow E-B junction for the PNP. In all cases, that resulted in a short, putting the full Collector voltage through the Base back into the Step Gen output.

The protection we already added as a modification by using a 100K series resistor and clamping diodes to the rails will help to protect the voltage feed-back Opamp, but that still leaves the rest open for destruction.

I looked for days and studied other CT designs and looked for possible protection circuits for high voltage protection for Opamp inputs and did not find any protection methods for voltages over say 40V that could be used in our application.

Not knowing how to go further, I called in the help from Bud again, and after some brain-storming and long days, he eventually came-up with a clever circuit that uses MOSFET switches to disconnect the Step Gen output section from harms way when the voltages go beyond the supply rails.

Bud found out by using LTspice that there is an issue when the output of the MOSFET supply gets shorted. This can easily happen at the DUT connector, when the Collector gets shorted to the Emitter somehow. This can be caused by a pilot error, or a blown DUT.
 
He came-up with some measures that will add better protection to the supply. At the same time, we found that we needed even better protection for the Step Generator Buffer circuit due to the changes that were introduced by the new offset functionality. There is an additional Opamp that we now need to protect.
 
After a lot of trying things out with LTspice, and discussing and trying different methods, Bud came-up with -in hindsight- a quite simple method to add much better protection, at the same time eliminating a number of parts. Instead of protecting the output of the Step Gen to voltages up to 200V coming from the Collector/Drain supply, we now simply clamp the input to the supply and remove the output when a problem is detected. The protection is active, meaning that as long as the fault is there, it is active. When the fault is gone, everything goes back to normal. No manual reset required, and no fuses to replace. A fault indicator LED will be added to the front panel to warn the user.

Because both supplies are on different and floating supplies, so the detection signals that need to drive the Collector/Drain supply needed to be isolated with optical-isolators.
This means that both the Collector/Drain supply board and the Step Gen Buffer board needed yet another board turn to accommodate these changes and also add all the other refinements and changes that were made. 
 
Below is a rudimentary schematic showing this new output protection method for the Step Generator circuitry.
 

This circuit provides some of the protection to the Step Gen Buffer output against lethal Collector/Drain supply voltages that could find its way to the Step Gen output. This can happen by accidental pilot error or a destructed DUT device. As I stated before, Opamps have a hard time surviving when voltages are present at the inputs that are beyond the VCC and VDD supplies. The trick was to detect that situation and prevent damage. The circuit above does that.

The output of the Step Gen Buffer circuit, also going to the Base/Gate of the DUT, comes in on the left hand side of the diagram. Diodes D1, D2 and the two opto-coupler diodes work together to create a fault signal. When the Base/Gate voltage is going beyond one of the +/-15V supply rails, actually at +/-17V,  one of the opto-couplers will fire and turn on the dual transistors configured as an SCR. The SCR flips and will turn on both MOSFET's. Q3 will strangle the input to the MOSFET supply and completely remove the Collector/Drain output voltage. Q4 is used to turn on a fault indicator on the front panel so the user is alerted.

The R/C set by C1/R9 will release the SCR after about 15mS. When the fault is no longer there normal operation continues otherwise the output remains clamped.

After I got a working board, I collected enough courage to test the safety feature. I used my lab supply to inject a DC voltage with a low current to the output of the Step Gen, and slowly increased the voltage. At +/- 18V the safety circuit cut in, and eliminated the triangle signal going to the MOSFET output section, reducing it to zero and lit the warning LED. Success!
 
Now I need to find enough courage to really put this circuit to the test by applying the full 200V triangle waveform the the Base connector of the DUT. I also need to do some short tests on the 35, 75 and 200V volt ranges. Initially, I avoided doing these tests in fear of blowing something up that I didn't have the replacement parts for in case something went wrong.

Step Gen protection Test

I finally found the courage to do the real Step Gen protection test. To make the test, I added a small jumper wire between the C-B connections on the DUT test socket. I monitored the X-output with my DSO and used the CH2 connected the the Y-channel, or monitored the Fault signal with a 10x probe.
 
I first selected the 35V range, and selected a few volts on the output so I could see it on the scope. I also selected the X1 current range, but set the CL to minimum.
I first tried the Voltage mode. This has a different feed-back loop. I slowly increased the CL setting so I had a signal and increased it just before the Fault kicked in. 
 

The Y-amp shows the distorted Base voltage.
 
I then increased the sweep voltage until the fault signal came on. This was at 18.4Vp-p. Further increasing the voltage only changed the shape of the output, but not the voltage.
 

 
Further increasing the sweep voltage will change the slope and the pulse width, but not the height. Even switching to the 75V range or as the acid test, the 200V range and turning up the voltage to 200V did not change the situation. The output and feed-back loops of the Step Gen are now fully protected.
 
I also used a 10x probe to look at the Fault signal in relation to the sweep voltage and this is the result:
 

 
As soon as the triangle waveform goes beyond 18V, the protection kicks-in and that turns off the triangle feed to the Collector/Drain voltage output. It keeps the signal off for a little while, and then frees it again.

In the Current mode, it looks a bit different, but works the same.


There is no Base signal in the current mode. The sweep voltage is again clamped at 18V.
This protection circuit works really well. Kudos to Bud!


Extending the Step Gen attenuation ranges

It had always been difficult if not impossible to measure high gain devices like Darlington transistors. The lowest setting of 1uA/step was still far too high, so we added 4 more by switching from a 12 to a 16 position rotary switch. The added settings will be for 500, 200, 100 and 50nA.

New offset circuit

Mark was not very impressed with the way I implemented the offset feature for FET's. I simply used the same circuit for both BJT's and FET's, but that's not ideal. The trouble is that with a normal step voltage for FET's, almost any offset will drive the output into the supply rail. You can circumvent the problem a bit by lowering the internal step voltage, or increase the supply voltages, but that's still a work around and not a very good solution.

Mark figured out a way to create a dedicated offset circuit for FET's. The BJT version will stay the way it is. The user will not even know about this, because the switching from one offset circuit to the next will be accomplished by the same BJT to FET selection switch already on the front panel. We just change it from a SPST to a SPDT version to activate either circuit.

Dealing with thermal issues

When you're testing devices with higher currents, there are two effects you have to keep in mind. One is that the self-heating of the device while you are testing, can distort the I/V display because of an effect called looping. This is caused by the way the DUT is activated. With the single step level at the Base, the Collector is getting a raising voltage due to the triangle based supply. The higher the voltage becomes, the higher the thermal heat will be. This typically results in a gain change, so the curve will bend up a little. If the triangle voltage now goes down, the heat dissipation gets less and the gain changes again so the curve will bend down a little. This causes the typical elliptical looping of the traces. Below is an example of a very minor case on a Tektronix CT.


The thermal heat of the DUT die can increase very rapidly and can get very hot, so much so, that you have to stop the test to let it cool off again. If you don't notice it in time, your DUT may have been damaged or even died of a heat stroke already. With high currents needed for power devices, you can't even run the test for more than a few seconds and the looping of the trace can become so big that it will be impossible to interpret.

There is a way to cheat however. When you select only one half of the waveform per step, as you can do with a triangle waveform, you can eliminate the looping effect. When you use a half sine-wave, as the Tek 576/7 do, that trick is not possible. Look at the first Blog of building the CT project to see a more elaborate description.

Professional Curve Tracers allow you to use a pulsed step mode, by which there is a pause after each complete step cycle. This gives the DUT some time to cool down before the next step cycle arrives.

I implemented a similar functionality for Version 3 by adding a few components to the Step Gen circuit. With a potentiometer adjustment, it adds several Milli seconds of delay between step cycles. The delay is synchronized with the end of the step cycle, and can be applied for every step selection from 1..7 steps.

Below are two screen shots that show this feature in operation on a prototype. The first picture shows the normal operation but shown in the time-base mode of the DSO.
The second picture shows the delayed step function. It starts with about 40mS delay between the step cycles. This can be extended to about 150-200 mS by using a potentiometer on the front panel. This is the practical maximum because the trace starts to "flicker" due to the pause between the X-axis acquisitions. The display can be adjusted somewhat by changing the time/div. setting of the DSO to make it as smooth as possible.



We are currently at Revision 3a for this board.

 

6. The XY Output Amplifier and DUT circuit

This circuit contains the XY amplifier section together with the select-able IC current shunt and also the DUT test section.
 
 


The ZIF socket is used to try various DUT's during the testing and verifying of the CT with the 10x10 boards.
 

Dealing with the XY display noise level

Because I'm using a relatively inexpensive DSO, a Rigol DS2072A, most of the X-axis displays for small signal transistors are very noisy on my DSO because I have to use V/Div. settings that are in the mV area and they show a lot of noise. It's not so much the DSO itself that is noisy, but the combination of the DSO input circuitry and the pick-up of noise makes the traces very fuzzy.

Both Mark and Richard use professional scopes and they don't have this issue.  There are two solutions. We can add another Opamp with higher gain, but that will also amplify the noise from the source. The other solution is to use a higher value shunt. Both solutions will allow you to avoid the lower level Volts/Division settings of the DSO. 

I decided to use two different IC shunt resistors, because using a single 1 Ohm resistor does not make sense. (pun intended)

By adding a toggle switch to the front panel, the user can now select a 1 Ohm and 10 Ohm shunt resistor values, in effect multiplying the IC current by x1 and x10. This will allow you to use V/Div. settings that are a factor ten higher and therefore more free of noise and we will have a better sensitivity at lower currents as well.

Here is a measurement taken with the 1 Ohm shunt, and a 2mV/Div. setting on my Rigol.

Here is the same measurement, but now with the 10 Ohm shunt, allowing you to go to a 20mV/Div. setting.


Note that the small "opening" in the trace for the second step is caused by the period the DSO needs to process the acquisition of the collected data. This "hole" only shows when you make a screenshot. Look at the first post of building a CT for more information.

Small offset on the Y-axis

Richard has found that on his CT there is a slight offset of the X-Y picture. This is probably caused by part tolerances. He fixed it by shifting the output of the Opamp a little with a high value resistor to a rail. We're going to see if we can address that problem by using an Opamp that has a built-in offset adjustment. 

 

We have a fully functioning Version 3 Curve Tracer

Mark has finished populating the latest revisions of the Collector Supply (rev 8a) and the Step Gen output board (rev 3a), and also added the DUT/X-Y amp board to the collection. He now has a fully operational V3 Curve Tracer spread out on 6 10x10 boards.

 


Here is a measurement of a 2N2904 transistor using the double slope triangle method:


And here a 2N7000 MOSFET, using the Step offset feature.


Due to my vacation, I was behind the curve, but Mark sent me the Rev8a Collector/Drain Supply and the Rev3a Step Gen output boards with the SMD parts already populated, so I was able to quickly add these two boards to my own setup. This has been done and after a few small fixes, the two boards are functional. I have then started to populate the DUT/X-Y amp board to get a fully functional CT as well.

This is my now fully functional setup: 

Here is what you see on the picture:

Top left with the transformer on it is the Aux Supply. To the right of it is the AC supply withe the green color and with the very large capacitor. Above that is the main AC supply transformer mounted on the back-panel of the enclosure with the main socket, fuse and main switch. To the right of the AC supply is the 120VAC transformer. On the top right is the red board for the Collector/Drain Supply. It has the large heat-sinks on it where the MOSFET's are mounted on. The two potmeters are the Voltage selection and the Current Limiter.

In the middle, you see a blue board that is the Triangle Generator and Step Selection. The number of steps is selected by a wire jumper.

To the lower left in black is the Y-Y amplifier board with the DUT section. There are two small coax cables going to me DSO. I have a power transistor in the ZIF socket.

The white board is the Step Gen Buffer output board. The potmeter to the left of it is for the Offset. Mark had an idea to use a divider jumper to reduce the Step outputs so we could use less expensive rotary switches.  With this 10x10, we can use a simple jumper on a row of pins to select the output settings.  Unfortunately, Mark's idea did not work in reality, so in order to add the 8 lowest settings, I used a small test board with THT resistors and a 16 position rotary switch instead of the jumper selection to create the full range. It is not pretty, but functionally does the job although, not surprisingly,  there is a lot of hum and noise in the lowest uV/nA settings.


First measurements to test the functionality

Below is a measurement of a 2N3904 as an example (20uA/Step) using the single slope triangle method.

First is the traditional Time-Base picture of the Collector voltage and the Base current and below it the I/V plot in the X-Y mode. The Step is not flat because the Collector voltage will change the gain, and hence the current. You can see that with higher steps (current) the flatness changes quite dramatically. This shows up in the X-Y plot with upwards going slopes at higher Base currents. This is quite typical for a 2N3904. There are other transistor types where the lines stay horizontally flat for every step, meaning that the gain or beta performance is more uniform across the Base current spectrum. 

You need a Curve Tracer to see this effect.



Also note how much cleaner this X-Y plot is with the single slope method compared to the Version 1b and also the Version 2.

We identified a few issues that we were able to resolve or fix already and are working on a few things we need to try, possibly involving yet another board turn, but the CT is now fully functional and a lot of testing and profiling still lies ahead of us.


The BJT dV/dt problem

While profiling the CT, we stumbled on a rather strange phenomena that we're trying to understand and see if we can explain it, or better yet, design it into oblivion.

This phenomena shows up at very low Base currents for BJT devices, and also with higher Collector voltages. For reference, look at the screen shot above made with a 20uA/Step and a 12V Collector voltage. When you reduce the Base current to lower levels, we see a change in the Step function. There is a sudden drop when the Collector voltage (the triangle) changes direction. This drop in the current creates a double line display for every step. Below is the Time-Base picture to show the situation at 1uA/Step. Below that is the X-Y plot with the resulting double lines due to this drop.



 
BTW, the "funny" transition in the lower left corner is due to the turn-on point of the B-E junction (at around 600mV) and that is always there on the first step, seen with low step currents. Look again at the Time-Base picture. Note that the very first edge of the first step in the cycle, is a little bit to the right of the start of the triangle. When the triangle voltage goes beyond the junction voltage, the device turns on, but that is with a bit of a delay due to the triangle shape, and that's what you see in the X-Y plot. That's not the issue at stake though.
 
With the help from Bud we now understand that we seem to have introduced an extra "rig capacitance" that is introduced in the C-B junction, which changes the dV/dt constant and creates a charging/discharging phenomenon at the turning point of the Collector voltage, causing the transition. 
 
The size of the the drop is related somewhat to the triangle frequency (dV/dt : the "t" makes it timing related) but even more to the C-B capacitance. Every BJT device will have some capacity, called the Miller capacitance, but our circuits may add about 10pF in addition, which Bud's simulations in LTspice proved. We're now trying to find the source of this "rig capacitance" and may have to go to yet another board turn to see if we can eliminate it.
 
When I started to test more DUT variations, I ran into related issues that are most likely caused by the long wiring and long interconnects with the current setup, and the modifications we had to make to get all steps functioning.

I'm pretty certain this is all caused by our current setup and that makes it difficult to continue to profile the CT while these issues are still there.

To continue to test and profile while trying to minimize this effect, I lowered the base frequency to about 155Hz. My DSO display is still very nice so no harm is done, although it may be different on an analog scope. 


Moving forward again

Mark and I made the decision to not go to two separate board turns again, but to go straight to the layout for the front-panel PCB we will need eventually. This board will combine the Step Gen buffer section, the DUT section and the X-Y amplifier section. When we do that we can make sure we eliminate long connections and avoid adding parasitic capacitance as much as possible.

 

The Front Plate

I had made a front-plate design a while ago that we will now start to follow. It is not the final design but close enough. BTW, VBA stands for the initials of our surnames. The face plate will be mounted just in front of the font-panel PCB, and it will be a PCB itself using black as the color and with white silkscreen for the text.

 

Making complete measurements to verify the operation

Below I will describe some measurements of devices to see how well the CT behaves and if we can find things we need to understand, fix or ignore.

Profiling a small signal BJT

So with what we have now, with some of the limitations still there, what can we do already?
Let's look at the venerable 2N3904, probably the most popular small signal NPN BJT. This is a 40V VCEO transistor that can handle an IC of 200mA and has an hFE (beta) between 40 minimum (at 100uA IB and VCE of 1V) and typical 300 (at 1mA IB and VCE of 1V), which is a very large spread. I suggest you look at the datasheet for reference.
 
So how do we use the Curve Traces to look at this device? 
For reference, look at the face plate above. I'll do the setup going from left to right. 
But first, turn the Sweep Voltage to 0% and set the DUT selector to off.

Step Delay should be off. Offset should be off. Select the N Polarity.
Select the BJT mode and select 7 steps. Set the Step Base current output at 100uA/step.
 
Plug the transistor in the left DUT socket and select the DUT off position.
 
Set the Current Limit to 100%. 
Set the current range to x0.05 to create a maximum current of 2A x 0.05 = 100mA. 
Set the X-Amp to x10, this is for small signal devices. Higher powered devices will need the x1 setting.
Set the Sweep Voltage Range to 35V. 
 
On the DSO, select the X-Y Time base. 
Adjust the sampling mode to a lower setting, I use 70KPoints to reduce the noise.
Set CH1 to a Ratio of 10x so the readout is 1:1 with the Sweep Voltage. Select a limited bandwidth to reduce noise. I use the lowest setting of my DSO; 20MHz.
Set CH2 to 20mV/Div, 20MHz bandwidth and a Ratio of 0.01 to make the readout 1:1, meaning that 1mV represents 1mA.

Adjust the vertical positions so the dot is at the cross-hairs of the first division vertical, and the first division horizontal (the 0V and 0mA origin).

Select the left DUT position to power the transistor. Turn up the Sweep Voltage to have 5 divisions horizontally, which will be a Collector voltage of 10V.

You should now have the following display or close to it:



So what do we see here?
The first step of the cycle is at 100uA. We see that this results in about 22mV. The 22mV represents an IC of 22mA so the hFE or beta will be about 22mA/100uA or 220. 
When I measured this transistor in my little China test device, it showed a beta of 225 with a VCE of 5V, which is close enough and in agreement.
However, what this little tester does not show is that the beta changes quite dramatically with higher steps or Base currents and also with different VCE's at these higher IB's.

So what happens when we lower the Base current?
When we lower the Base current to 10uA/Step, and set the V/Div to 2mV, we get the following result:


Note that the distribution per step is now much more uniform, and the lines stay more horizontal, meaning that the beta does not change as much with a higher Collector voltage. This is a much better operating area for this transistor. The hFE is now 10uA Base current and 1.8mV or 1.8mA which is about 180, so it's dropping.

We can go even lower, to 1uA/step:
 

Now we're getting down into the noise and the current CT rig capacitance is starting to play a role as we showed above in the Blog. To reduce this phenomena, I lowered the base frequency of the triangle/steps to about 155Hz and now the display is OK with only a little blossoming.
The hFE is now much lower, 2uA for the second step that shows 200uV, so a gain of only 100.

When we raise the Base current to 1mA/step, we are getting into the maximum Collector current area of 200mA.


Luckily, we set the maximum current to a limit of 100mA, because without it, we could have killed the transistor due to thermal stress. If you use your fingers on the device, you will notice that it will get warm, but with this current limitation, there is no harm done to it.
 
We can measure the device with a higher current limit, but in order to reduce the thermal stress, we need to activate the Step Cycle Delay function, and set that to the maximum.
Now we can select a higher current range by changing the range from 0.5x to 0.1x, which at a maximum current of 2A will now be 200mA which is the limit of the 2N3904.  


The transistor could easily go beyond the 200mA, but it is Current Limited, and does not get overly hot. The display does not drift upwards due to the thermal stress that increases the beta, which is a sure sign that the device is getting into a thermal run-away that could lead to its quick heat-stroke death.

The 2N3906 is specified with a maximum VCE0 of 40V, lets see what happens when we raise the voltage. We set the Base current back to 10uA/Step and slowly raise the Sweep voltage to 55V.

 

Beyond 40V, the transistor is getting near the breakdown voltage (Vcbeo) and the Collector current skyrockets due to the avalanche effect. This is a measurement you should make carefully. The specification for this transistor of 40V is met. 

Note
Because the Collector current goes up fast due to the avalanche effect, setting the proper current range and setting the current limiter is very important because the device can easily get damaged or even destroyed before you know it.
 

There are a few more measurements we can make to further profile the device, but this already shows a fine working Curve Tracer in a typical application.

Profiling a high power BJT

Testing a high power BJT like the MJL3281A is a little different in a few aspects.
The MJL3281A is a 260V 15A NPN BJT with an hFE between 45 and 150. It is one of the transistors we used in earlier Collector/Drain supply versions, most notably in the Version 1b.
 
Because this transistor can dissipate up to 200W, we need to be a little careful.
First of all, I switched the current range to x.5 to allow a maximum current of 1A.
I then started with a Base current of 100uA/step. It produced the following result:
 
 
The hFE stays very flat with the Collector voltage and Base currents. The gain is 9mV=9mA/100u is about 90.
If we go to a higher Base current, like 1mA/step, we get the following result:


The device is not current limited, but only shows 3 steps? This is because the Y-output amplifier output is hitting the 24V supply rail. 
 
This is because I did not change the IC current shunt from the X10 to the X1 setting yet. This is in effect a 10X multiplier and this causes the input signal to hit the supply rail of 24V.
The X10 multiplier is intended for small signal devices to avoid low V/Div settings of the scope.
 
You could also reduce the number of steps to avoid that, in this case, we can only allow 2 steps. 
 
With the X1 setting, you also need to change the Y-channel of the scope to a ratio of 0.1X to keep the readout consistent. By also increasing the Current Limiter, we can get the full 7 steps displayed again:
 

 
 
When we go to a much lower Base current, like 10uA/step, we get the following picture:
 

Here we see the dV/dt effect caused by our current configuration in all it's ugly glory. Here is the corresponding Time-Base display:


So how does it behave when we apply the maximum VCE0 of 200V?
I set the Base current to 100uA/step, turned the CL adjustment to 100% and set the current limiter to x1, to have the full 100mA in this range at our disposal.


At higher Base currents, the Collector current is about to shoot up due to the avalanche effect and the device is getting close to the breakdown voltage. The dV/dt effect is more noticeable with this measurement.
Be careful testing the temperature of the device with your fingers, there is 200V on the collector pad. Keep fingers on the plastic! However, with 100mA, it should not get warm. Also, make sure you select the right current setting and use the current limiter to protect the device.
 

Profiling a small signal MOSFET

I'm using the LP0701 in the TO-92 package, which is a P-channel MOSFET. It has a VGS(th) of -1V, a DSS of -16.5V, an RDS(on) of 1.5 Ohm and an ID(on) of -1.25A. So how do we go about testing that device.
 
First of all, the polarity should be P, and this will take care of all the negative polarities of the specifications. It is also a V(oltage) device, so select that as well. We'll select 7 steps. The VGS(th) is 1V, so we'll select 500mV/step to get over the threshold, and a 10V sweep voltage. 
 
Because a MOSFET can conduct a large current, even though it is considered a small signal device, we set the current range to X.1 for a maximum of 200mA and set the CL to 50% so we have a safe maximum of 100mA. We also need to set the Y-amp multiplier to X1 and change the DSO channel multiplier to 0.1x, not the 0.01x we used for the small signal current devices.
 
Slowly raise the CL limiter to 100%.
 
So what do we see?
 

 
Not what we expected, right? We see only two steps and the rest is current limiting at 200mA. The reason is that with 500mV/step, the device is conducting a lot more current with the higher steps than you would expect from a small signal device.
 
Lower the CL setting first and then switch to a higher current range of X.2 which will be 400mA.
Slowly turn up the current limiter and observe the display. Turn it down quickly to avoid too much heat.
 

This is more like it, but we till can't see the higher steps because of the large Drain current that is limited at 400mA.
 
We need to lower the volts per step, so we'll go down in current. 
At 200mV/step, things start to look a bit more familiar:



 
 
However, we still only see steps 4, 5, 6 and 7. Why? Because step 4 will be at 4*200mV which is the VGS of 1V, when the device starts to conduct so that's the first step we'll see. Steps 1-3 are hidden from view.
How can we look at all the 7 steps? We need to go to an even lower step voltage so now we select 50mV/step to help keep the current in check.
 
We now have to use the Step offset feature to put the zero(!) step at the VGS(th) of 1V. We select the negative offset polarity (P-FET) and carefully adjust the offset to display all 7 steps.
You may have to raise the current limit to show all 7 steps without limiting, but turn it down again when you have seen this to keep the device from over-heating.
 
 

The zero step is now positioned at a voltage of about 1V, so the steps will further open up the device a step-at-a-time. The beta is increasing with the Drain voltage, something to be aware of. Note that the Drain current is almost at 250mA with step 7. You can use your fingers to keep an eye on the temperature of the device.

To keep the device from over-heating, we can use the step cycle delay function that greatly helps to limit the dissipation. Turn it on, and set it to the maximum. Watch the display and keep your fingers on the device to "feel" the difference.

Let's now see what the Breakdown Voltage (BVDSS) is. This is the voltage at which the reverse-biased body-drift diode breaks down and significant current starts to flow between the Source and Drain by the avalanche multiplication process. Turn up the Drain voltage until the device starts to show this process.



 
At about 20V, you can see that the Drain current is rapidly increasing due to the avalanche effect and is approaching the breakdown voltage. The specification of 16.5V is easily met. The fact that you see oscillation can be part of this particular measurement. The device is getting more and more unstable. 
 
At this voltage level and because the FET is fully conducting, the device will get very hot, so be quick, and be careful. Because of the RDS(on) of only 1.5 Ohm, even the step cycle delay feature will not reduce the thermal heat enough for a long measurement when you use all steps. Make sure you use the right current range and use the current limiter to protect the device from damage or destruction.
 
A more prudent method for determining the VDss Breakdown Voltage is to use only one step, and use the offset feature to just turn the device on, and then increase the Drain voltage to keep dissipation under control.
 

Profiling a high power MOSFET

One of the power devices I used was out of the small selection of suitable N-MOSFET's we picked for the Collector/Drain supply, the STW6N90K5, a 900V 6A device that has a Vgs(th) of 4V and a Ciss of 432pF.
 
To get a handle on the Gate voltage, you really need to use the offset feature that allows you to set the proper Base step voltage to turn the device on.
 
Here is a screenshot taken with 100mV/Step, 7 steps, 10V and a bit of positive offset to make the zero step already conduct the device.



 The device is getting a tiny bit warm.

To test it with a higher voltage, and keep the dissipation in check, I reduced the number of steps to 4. I used the 75V range with the maximum voltage.


You can see that the gain no longer climbs up after the voltage is at about 40V, this is a much better operating area for this device.

In the 200V range with maximum voltage, this is the result.


There is current limiting in effect due to the dissipation that I wanted to keep in check, even with a mere 100mA. The device gets hot and the curves start to drift up.

To counter that, you can use the step cycle delay function.


Even with the step cycle delay activated at the maximum delay, the curves still drift upwards, a sign that it still gets hot quickly. Note the beginning of blossoming due to the difference in temperature with the triangle waveform going up, and then down. This is a very typical effect caused by thermal heat.

When you need to make longer measurements with these kind of power devices, it may be wise to add a heat sink to it and/or use a fan to keep it from a runaway-thermal effect that could damage or even destroy the device.

With a specification of 900V for the VDSS, we cannot do the Breakdown Voltage test with the maximum of 200V that is at our disposal.


First Preliminary Conclusion

With these measurements, I hope to have demonstrated that we are finally getting very close to the completion of the Version 3 Curve Tracer. 

 

Todo's

Mark is now working on the layout of a new board that combines the Step Gen Buffer and the DUT/X-Y Amp functionality as it will be in the final form. It should sandwich behind the Face Plate shown above. We hope to be able to eliminate stray capacitance a bit better. We're also going through an Auxiliary Supply board turn that uses a smaller VA transformer to reduce the physical size, and that will also reduce the heat developing on the regulators due to the excess voltages. Finally, it will have two different versions of the multiplier circuit to get the +24V supply.

When that all works as advertised, we will start to work on creating a main board with the remaining circuits on it so we can start to put it all in the enclosure.


It all takes a lot of time and it's slow going at times, but we're making very good progress.

Stay tuned for more information and updates...